Copyright(C) 1994,1995,1996,1997 Terumasa KODAKA , Takeshi KONO
■Printer port
Target Normal, LT/HA
Chip 8255A equivalent
Explanation o In normal mode, the printer port uses an 8255 equivalent.
o The port is output only, and only one bit of BUSY is input to the printer port.
o Ports B and C of the 8255 printer port are also used for purposes other than the printer port.
Related INT 1Ah
I/O 0439h bit 7
0000:0458h bit 2,1
0000:05B3h
I/O 0040h
Name Data port
Function
[READ/WRITE]
bit 7-0: PORT A read/write
Explanation o Sets the parallel data to be output to the printer port.
o This port is PORT A of the 8255. It is usually initialized with mode 0 output.
u Reading from this port is for diagnostic purposes. Normally, the last value
written is read out, but in some notebook models, in order to reduce power
consumption due to the current flowing through the pull-up resistor, this port
is set to FFh if there is no access to the printer-related I/O for a certain
period of time. Therefore, the value read out is not necessarily the last
value sent to the printer.
Related I/O 0042h
I/O 0046h
I/O 0042h
Name Status port
Function
[READ] PORT B Read
bit 7,6: TYP1,0 System type
11b = PC-9801U,PC-98LT･HA
10b = Other models
01b = Undefined
00b = First generation PC-9801
bit 5: MOD System clock
1 = 8MHz (timer clock 2.0MHz)
0 = 5/10MHz (timer clock 2.5MHz)
bit 4: LCD Plasma display usage status (DIP SW 1-3)
1 = Not in use (DIP SW 1-3 OFF),LT･HA,NOTE
0 = In use (DIP SW 1-3 ON)
* This does not indicate the current mode, just the DIP SW status. SW reading
and function are valid even on high-resolution compatible devices.
bit 3: HGC Graphics expansion function (DIP SW 1-8)
1 = Basic mode (DIP SW 1-8 OFF), LT/HA
0 = Extended mode (DIP SW 1-8 ON)
* This just shows the state of the DIP SW, it does not indicate the current mode.
bit 2: Printer interface BUSY# signal
1 = Inactive
0 = Active (BUSY state)
bit 1: CPUT Operating CPU ■ [Normal]
1 = V30, V33
0 = 8086, 286, 386, 486, Pentium processor
* Indicates the CPU that is actually operating.
bit 1: CPUT System type ■[LT/HA]
1 = HA
0 = LT
bit 0: VF VF flag
1 = PC-9801VF, PC-9801U
* Models with only built-in 2DD I/F
0 = Other models
[WRITE] PORT B write
No operation
■[HA] With HA, the value of memory switch 11h is written at initialization.
Bits other than bits 2 and 1 can read the written value.
Explanation o Reads various status input from the printer port, some DIP switch settings, etc.
o This port is PORT B of the 8255. Normally, it is initialized with mode 0 input.
o With PC-H98 (normal mode), if you execute INT 1Ah - Function 17h and make
the printer interface fully Centronics, this I/O port will become compatible
with high resolution.
Related I/O 0040h
I/O 0044h
Name Strobe port
Function
[READ/WRITE]
bit 7: PSTB# Printer strobe signal
bit 6-4: Unused (set to 000b)
bit 3: IR8 (INT 10h) interrupt request
0 = ON
1 = OFF
* Only when operating with 8086 or V30. When operating with a 286 or higher
CPU (including V30 equivalent mode), it is disconnected. However, IR8 is
used by the remote control controller in the PC-9821Cx2 and Cb2. Unused in LT and HA.
bit 2: Unused (set to 0)
bit 1: RST287/RST387
0 = Do not reset with CPU reset
1 = Reset with CPU reset
* Only when operating with 287 or 387
bit 0: Unused (set to 0)
Explanation o Controls the printer strobe.
o This port is PORT C of the 8255. Normally initialized to mode 0 output.
o For details, see the 8255 data sheet.
o When INT 1Ah - Function 17h is executed in PC-H98 (normal mode) and the
printer interface is made fully Centronics, this I/O port becomes compatible
with high resolution.
Related I/O 0040h
I/O 0046h
Name Control register
Function
[READ] None
[WRITE] Write control register
Explanation o Sets the 8255 mode. Normally initialized to xxh.
o For details, see the 8255 data sheet.
Related I/O 0040h
===============================================================================
■Printer port
Target Hi-Res
Chip 8255A
Explanation o In Hi-Res mode, a fully Centronics printer interface is used.
o In the PC-H98 series, input can also be made from the printer port.
Related INT 1Ah
0000:041Ch
I/O 0439h bit 7
I/O 0040h
Name Data port
Function
[READ/WRITE]
bit 7-0: Parallel data output to printer port
Explanation o Sets the parallel data output to the printer port.
o This port is PORT A of the 8255. Normally initialized with mode 1 output.
o For details, see the 8255 data sheet.
Related I/O 0042h
I/O 0046h
I/O 0042h
Name Status port
Function
[READ] PORT B Read
bit 7: SELECT#
bit 6: FAULT#
bit 5: PE#
bit 4: DC+5V#
bit 3: INPUT BUSY#
bit 2: BUSY#
bit 1: Reserved
bit 0: ACK#
1 = Inactive
0 = Active
[WRITE] PORT B Write
* No operation
Explanation o Reads various statuses input from the printer port, some DIP switch settings, etc.
o This port is PORT B of the 8255. Normally initialized with mode 0 input.
o See the 8255 data sheet for details.
Related I/O 0040h
I/O 0046h
I/O 0044h
Name Strobe port
Function
[READ/WRITE] PORT C Read/Write
bit 7: OBF# (Output Buffer Full)
0 = Printer data cannot be accepted
1 = Printer data can be accepted
* Not connected to the outside.
bit 6: ACK# (Acknowledge Input)
0 = Data acceptance completed
* Connected to ACKNLG of the printer connector. (When reading)
bit 5,4: Unused
bit 3: INT 16h output (Slave PIC IR6)
* Connected to I/O 0042h bit 1.
bit 2: PSTB# output
0 = Active
1 = No Operation
* PSTB# signal of the printer port
bit 1: RST287/RST387 output
0 = Do not reset with CPU reset
1 = Reset with CPU reset
* (Only when operating with 287,387)
bit 0: INPUT PRIME# output
0 = Active
1 = No Operation
* INPUT PRIME# signal of the printer port Resets the printer.
Description o Controls the printer strobe.
o This port is PORT C of the 8255. Normally, the upper 4 bits are set to mode
1 and the lower 4 bits are set to mode 0 output.
o For details, see the 8255 data sheet.
Related I/O 0046h
I/O 0046h
Name Control register
Function
[READ] None
[WRITE] Control register write
Description o Sets the 8255 mode.
o This port is PORT C of the 8255.
Normally, PORT A is set to mode 1 output, PORT B to mode 0 input,
and the upper 4 bits of PORT C are set to mode 1 and the lower 4 bits to mode 0 output.
o See the 8255 datasheet for details.
Related I/O 0040h
I/O 0042h
I/O 0044h
I/O 0448h
Name Printer interface extended mode register
Target PC-H98
Function
[READ] Read status
bit 7: IS INT status
1 = INT cause occurred (reading this port will return to 0)
0 = No INT cause
bit 6,5: Unused
bit 4: IE INT enable
1 = Enable
0 = Disable
bit 3: DMA DMA/INT mode
1 = DMA mode
0 = INT mode
bit 2,1: Unused
bit 0: MOD Printer mode
1 = Extended mode (full Centro mode, enables DMA and DRST)
0 = Compatible mode (simple Centro mode, disables DMA and DRST)
[WRITE] Set status
bit 7: Unused (set to 0)
bit 6: DRST Reset DMA TC interrupt
1 = Reset DMATC interrupt
0 = No Operation
bit 5: Unused (set to 0)
bit 4: IE INT enable (disabled when interrupt is edge mode)
1 = enable
0 = disable
bit 3: DMA DMA/INT mode setting
1 = DMA mode
0 = INT mode
bit 2,1: Unused (set to 00b)
bit 0: MOD Printer mode setting
1 = Extended mode (full Centronics mode, DMA and DRST enabled)
0 = Compatible mode (simple Centronics mode, DMA and DRST disabled)
Explanation o Select whether to set the printer mode to full Centronics mode
or simple Centronics mode.
o In the PC-H98 series, full Centronics mode can be used even in normal mode
by operating this port.
Related INT 1Ah - Function 17h
INT 1Ah - Function 1Ah
-------------------------------------------------------------------------------
■IEEE STD 1284 interface
Target IEEE STD 1284 equipped machines
Terminology o PC-9800 series IEEE STD 1284 equipped machines use a 36-pin
1284-C connector. Each signal line is defined as follows:
-----------+-----------+------------------------------------------------------------------
Pin number | Direction | Signal line name
| | Compatible | Nibble/Byte | ECP | EPP
-----------+-----------+-------------+----------------+-----------------+-----------------
1 | P→H | Busy | PtrBusy | PeriphAck | nWait
2 | P→H | Select | Xflag | Xflag | UserDef2
3 | P→H | nAck | PtrClk | PeriphClk | Intr
4 | P→H | nFault | nDataAvail | nPeriphRequest | UserDef2
5 | P→H | PError | AckDataReq | nAckReverse | UserDef1
6 | Bi-Dir | Data1 | Data1 | Data1 | AD1
7 | Bi-Dir | Data2 | Data2 | Data2 | AD2
8 | Bi-Dir | Data3 | Data3 | Data3 | AD3
9 | Bi-Dir | Data4 | Data4 | Data4 | AD4
10 | Bi-Dir | Data5 | Data5 | Data5 | AD5
11 | Bi-Dir | Data6 | Data6 | Data6 | AD6
12 | Bi-Dir | Data7 | Data7 | Data7 | AD7
13 | Bi-Dir | Data8 | Data8 | Data8 | AD8
14 | H→P | nInit | nInit | nReverseRequest | nInit
15 | H→P | nStrobe | HostClk | HostClk | nWrite
16 | H→P | nSelectIn | 1284Active | 1284Active | nAStrb
17 | H→P | nAutoFd | HostBusy | HostAck | nDStrb
18 | H→P | Host Logic High
-----------+-----------+------------------------------------------------------------------
19 | | S-GND(Busy)
20 | | S-GND(Select)
21 | | S-GND(nAck)
22 | | S-GND(nFault)
23 | | S-GND(PError)
24 | | S-GND(Data1)
25 | | S-GND(Data2)
26 | | S-GND(Data3)
27 | | S-GND(Data4)
28 | | S-GND(Data5)
29 | | S-GND(Data6)
30 | | S-GND(Data7)
31 | | S-GND(Data8)
32 | | S-GND(nInit)
33 | | S-GND(nStrobe)
34 | | S-GND(nSelectIn)
35 | | S-GND(nAutoFd)
36 | P→H | S-GND(PeripheralLogicHigh)
-----------+-----------+------------------------------------------------------------------
* The direction of each signal line is
P→H: From external device to host
H→P: From host to external device
Bi-Dir: Bidirectional
o The interface for ECP is almost the same as the implementation on the ISA bus.
o It has a 16-byte FIFO, and compresses/decompresses RLE in hardware. However,
the interface itself does not negotiate any protocols, so when changing
protocol modes, negotiation must be performed in software.
o Among the models equipped with IEEE P1284, the PC-9821Ap2, As2, Bp, Bs, Be,
Bf, Ts, Cs2, and Ce2 do not have ECP mode. Functions such as FIFO other than
ECP mode can be used.
---------+---------------------------------------------------
ECP mode | Model name
---------+---------------------------------------------------
No | PC-9821Ap2･As2･Bp･Bs･Be･Bf･Ts･Cs2･Ce2
| PC-9801NS/A
---------+---------------------------------------------------
Yes | PC-9821An･Ap3･As3･Xt･Xa･Xf･Xn･Xp･Xs･Xe･Cf･Cx･Cb
| Xa16･Xa13･Xa12･Xa10･Xa9･Xa7･Xe10･Xt16･Xt13･St15
| Xv13･Xb10･V10･V7･Cx2･Cb2･Cx3･Cb3
| PC-9821Nf･Np･Ns･Ne2･Nd･Nm･Es･Ld･Lt･Ne3･Nd2･Na7･Nx･Lt2
| PC-9801BA3･BX3･BX4
---------+---------------------------------------------------
Related 0000:0458h bit 2,1
0000:05B3h bit 7,6,5
INT 1Ah - Function 17h
INT 1Ah - Function 1Ah
INT 1Ah - Function 1Bh
INT 1Ah - Function 1Ch
INT 1Ah - Function 1Dh
I/O 0140h
Name Data port
Undocumented
Function
[READ/WRITE] ■ [Standard parallel port mode]
* Printer data output and reading for diagnostics
[READ/WRITE] ■ [PS/2 parallel port mode]
* 8-bit data input/output port
[WRITE] ■ [ECP mode]
bit 7: Count/Address
1 = Channel address
0 = Run-length count
bit 6-0: Count/Address
* Forward channel command
Description o Sets the data to be output to D0-D7 of the IEEE STD 1284 connector.
o Valid only when I/O 0149h bit 4 is 1
Related I/O 0149h bit 4
I/O 0141h
Name Device Status Port
Undocumented
Function
[WRITE] None
[READ]
bit 7: nBusy
1 = Inactive
0 = Active
* Pin 1 of 1284C connector
bit 6: nAck
1 = Inactive
0 = Active
* Pin 3 of 1284C connector
bit 5: PError
1 = Active
0 = Inactive
* Pin 5 of 1284C connector
bit 4: Select
1 = Active
0 = Inactive
* Pin 2 of 1284C connector
bit 3: nFault
1 = Inactive
0 = Active
* Pin 4 of 1284C connector
bit 2: Unused?
bit 1: DC+5V
1 = Active
0 = Inactive
* Pin 36 of 1284C connector
bit 0: Unused
Explanation o Reads the state of various status signal lines of the IEEE STD 1284 connector.
u In the printer interface conversion connector included with
PC-9821As2･Ap2･Bp･Bs･Be･Bf･Cs2･Ce2･Ts and PC-9801NS/A, bit 7 of the data
output is connected to +5V. In a normal printer, +5V does not change during
operation, so you can check whether the conversion connector is attached by
checking whether +5V changes in sync with bit 7 of the data output.
o Valid only when I/O 0149h bit 4 is 1
Related INT 1Ah - Function 12h
I/O 0149h bit 4
I/O 0142h
Name Device control port
Undocumented
Target IEEE STD 1284 equipped devices
Function
[READ/WRITE]
bit 7,6: Unused (always set to 00b)
bit 5: Direction
1 = INPUT direction
0 = OUTPUT direction
* Valid only in PS/2 mode
* Sets the direction of pins 6 to 13 of the 1284C connector
bit 4: ackIntEn.
1 = Enable
0 = Disable
bit 3: SelectIn
1 = High
0 = Low
* Pin 16 of the 1284C connector
bit 2: nInit
1 = High
0 = Low
* Pin 14 of the 1284C connector
bit 1: AUTO FDxt
1 = Low
0 = High
* Pin 17 of the 1284C connector
bit 0: strobe
1 = Low
0 = High
* Pin 15 of the 1284C connector
Explanation o Sets the state of various strobe outputs.
o To set the data input direction, I/O 014Eh bit 5 must be set to PS/2 parallel port mode.
o Only valid when I/O 0149h bit 4 is 1
Related I/O 0149h bit 4
I/O 014Eh bit 5
I/O 0149h
Name Parallel port mode setting
Undocumented
Target IEEE STD 1284 equipped devices
Function
[READ/WRITE]
bit 7: Unknown (always 0)
bit 6: Unknown
bit 5: Unknown (always 0)
bit 4: Parallel port mode
0 = Simple Centronics mode
1 = Enhanced parallel port mode
bit 3,2: Unknown (always 00b)
bit 1: Unknown
bit 0: Unknown
Explanation o Sets the printer interface mode.
o At startup, it is set to simple Centronics mode, so I/O 0149h bit 4 is 0. To
use the enhanced parallel port function, this bit must be set to 1. When this
bit is 0, I/O 0140h, 0141h, 0142h, 014Bh, 014Ch, 014Dh, and 014Eh are invalid.
Related INT 1Ah - Function 17h
INT 1Ah - Function 1Ah
0000:05B3h bit 7
0000:0458h bit 2
I/O 0140h
I/O 0141h
I/O 0142h
I/O 014Bh
I/O 014Ch
I/O 014Dh
I/O 014Eh
I/O 014Bh
Name Unknown
Undocumented
Target IEEE STD 1284 equipped devices
Function
[READ]
Bit 7-0: Unknown
Explanation o Details unknown
Related I/O 0149h Bit 4
I/O 014Ch
Name Parallel Port Data FIFO
Test FIFO
Configuration Register A
Undocumented
Target IEEE STD 1284 equipped devices
Function
■[Parallel port FIFO mode]
[WRITE]■[Direction=0]
[READ]■[Direction=1]
* Input/output FIFO from parallel port
* Direction is set by Direction in I/O 0142h Bit 5.
Related I/O 0142h Bit 5
■[FIFO test mode]
[READ/WRITE]
* Write and read test data to FIFO.
■[Configuration Mode]
[READ/WRITE]
bit 7: Interrupt type
1 = Level trigger
0 = Edge trigger
* Uses edge trigger on PC-9800 series
bit 6-4: Implementation ID
000b = 16-bit implementation
001b = 8-bit implementation
010b = 32-bit implementation
011b
: = Reserved
111b
* 8-bit implementation on PC-9800 series.
bit 3: Reserved
bit 2: nByteInTransceiver
* Operation at event 35
bit 1,0: FIFO recovery
00b = a complete PWord.
01b = only 1 valid byte.
10b = 2 valid bytes.
11b = 3 valid bytes.
* No meaning in the PC-9800 series, which uses 8-bit implementation.
Explanation o This port has four different meanings depending on the mode set by I/O 014Eh bits 7-5.
o In parallel port FIFO mode, it functions as a data FIFO port to the parallel
port. The only valid READ/WRITE direction is the direction set by the Direction bit in I/O 0142h bit 5.
o In TEST FIFO mode, it is used for the FIFO test function. This port allows
both writing and reading, and data can be read in the order in which it was written. The FIFO has a capacity of 16 bytes.
o In configuration mode, this is used as a port to indicate the interface status. It can only be read.
Related 0000:05B3h bit 7
I/O 0142h bit 5
I/O 014Eh bit 7-5
I/O 014Eh bit 1,0
I/O 014Dh
Name Configuration Register B
Undocumented
Target IEEE STD 1284 equipped machines
Function
[READ]
bit 7: compress
bit 6: intrValue
bit 5-3: Interrupt address
111b = IRQ5
110b = IRQ15
101b = IRQ14
100b = IRQ11
011b = IRQ10
010b = IRQ9
001b = IRQ7
000b = jumpered IRQ address
* PC-9800 series always returns 110b, but IRQ14 is actually used.
bits 2-0: DMA channel
111b = DMA channel 7 (disabled on PC-9801 series)
110b = DMA channel 6 (disabled on PC-9801 series)
101b = DMA channel 5 (disabled on PC-9801 series)
100b = jumpered 16-bit DMA channel (disabled on PC-9801 series)
011b = DMA channel 3
010b = DMA channel 2
001b = DMA channel 1
000b = jumpered 8-bit DMA channel
* DMA is not used on the PC-9801 series due to the parallel port, so 000b is always returned.
Description o This port is only accessible when I/O 014Eh bits 7-5 are set to configuration mode.
Related 0000:05B3h bit 7
I/O 014Eh bit 7-5
I/O 014Eh
Name Extended control register
Undocumented
Target IEEE STD 1284 equipped devices
Function
[READ/WRITE]
bit 7-5: Parallel interface mode
000b = Standard parallel port mode
001b = PS/2 parallel port mode
010b = Parallel port FIFO mode
011b = ECP parallel port mode
100b = Unknown (vendor unique)
101b = Unknown (vendor unique)
110b = FIFO test mode
111b = Configuration mode
bit 4: Interrupt enable
1 = Interrupt disabled
0 = Interrupt enabled
* Sets whether to generate an interrupt on the falling edge of nFault
bit 3: DMA transfer enable
1 = Enable
0 = Disabled
* Always 0 on PC-9800 series
bit 2: Enable DMA end interrupt
1 = Disable interrupt
0 = Enable interrupt
* Always 1 on PC-9800 series
bit 1: FIFO full
1 = 16 bytes of data in FIFO memory
0 = FIFO memory can still store data
bit 0: FIFO empty
1 = No data in FIFO memory
0 = Data stored in FIFO memory
Explanation o Allows input operation of IEEE STD 1284 interface.
o Some models have ECP mode as a parallel interface mode, while others do not.
On models without ECP mode, the values of bits 7 to 5 do not
change even if 011b is specified for bits 7 to 5.
Table: Models equipped with IEEE P1284 and unable to use ECP mode
-----------------------------------------------------------------
PC-9821Ap2･As2･Bp･Bs･Be･Ts･Bf･Cs2･Ce2
PC-9801BA2･BS2･BX2
-----------------------------------------------------------------
Related I/O 0149h bit 4
I/O 014Ch
I/O 014Dh